1. Field of the Invention
The present invention relates to a digital-to-analog converter (DAC). More particularly, the present invention relates to a DAC capable of improving conversion speed, a source driver, and a method thereof.
2. Description of Related Art
Conventional DACs usually adopt a decoder to output a corresponding analog voltage according to an input digital signal. A reference voltage can be generated by means of resistors connected in series. By dividing the voltage with the resistors, the reference voltage corresponding to the input digital signal can be generated. When the input digital signal changes, the decoder switches to the corresponding reference voltage, and a voltage buffer outputs a corresponding analog voltage.
In source drivers of a liquid crystal display (LCD), the conversion speed of the DAC directly influences the display quality of the LCD. As the DAC needs to drive pixels in a panel, and the conversion speed of pixel voltage is determined by the driving capability of the DAC. Therefore, when the load on the panel end increases, the driving current required by the DAC also increases, and the conversion speed becomes lower, thus further influencing the display quality of the LCD.
FIG. 1 shows a DAC according to the conventional art. The DAC 100 includes a voltage divider unit 110, a selection unit 120, and a buffer unit 130, and generates an output voltage VOUT according to an M-bit input digital signal DAS, where M is a positive integer. The voltage divider unit 110 uses resistors R(1)-R(2M+1) to generate reference voltages V(1)-V(2M) between an upper limit voltage VU and a lower limit voltage VD. The reference voltages V(1)-V(2M) are coupled to the buffer unit 130 via switches S(1)-S(2M) in the selection unit 120. The decoder 122 selectively turns on one of the switches S(1)-S(2M) according to the input digital signal DAS. Next, the buffer unit 130 generates the output voltage VOUT according to the reference voltages V(1)-V(2M) corresponding to the input digital signal DAS.
The buffer unit 130 is constituted by an operational amplifier 135. Under ideal conditions, the output voltage VOUT changes with the change of value of the input digital signal DAS. However, a load capacitor CL that needs to be driven by the buffer unit 130 impacts the conversion speed of the output voltage VOUT. The greater the capacitance of the load capacitor CL is, the lower the slew rate of the buffer unit 130 will be.
With the increase of the size of the LCD panel, the capacitance of the load capacitor that needs to be driven by the source driver increases. Thus, the problem that the lower conversion speed of the DAC due to the load capacitor becomes more obvious, thereby further adversely influencing the display quality of the LCD.